17th May

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Almost forgot about the blog :p.
The official coding period began on the 14th of May, and work completed by me till now is as follows :

1) Migen :

I now have a satisfactory understanding of working with Migen. Personally, I feel Migen framework is more intuitive and provides a nice abstraction layer so that we can focus more on the logic part rather than usual humdrums ommon in Verilog such as initializations, datatype conflict, driver conflicts, etc

Anyone looking to learn Migen can go through these links :
- https://m-labs.hk/migen/manual/
- http://blog.lambdaconcept.com/doku.php
- https://github.com/m-labs/migen/tree/master/examples

These pretty much cover everything.

2) Installed Vivado and cable drivers:

I switched entirely to Ubuntu about 3 months back, so I needed to again install Vivado and the cable drivers for my FPGA - Arty board from Digilent. Cable drivers require sudo privileges so are not installed by default.

3) LiteX:

I started learning about LiteX today. My first SoC was this Lab Experiment created by my mentor Florent: https://github.com/enjoy-digital/fpga_101/tree/master/lab003

Anyone looking to learn how to create CSR maps and control peripherals using the host can solve this. My solution for the same can be found here: https://github.com/harshgugale/lab003

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