PRBS transreception module designed and tested!

-
I completed the design and testing of the PRBS transmitter and receiver module on the Arty Board.

Code :
1) All modules may be found here https://github.com/harshgugale/ber_analyzer_arty.

2) Requires local install of LiteX libraries.

3) Calculation of BER may be done using the files here: https://github.com/harshgugale/ber_analyzer_arty/tree/master/test_host . File control_prbs.py is an abstraction file for BER calculation.

Features :
1) Host selectable config for PRBS 7, 15, 23 and 31.

2) Implemented a lookahead PRBS generator for supporting multi - Gbps serial linerates for GTP transceivers (which will be implemented later).

3) Host selectable percentage error injection.

Next steps :
1) Add 8b/10b encoding and decoding functionality.

Comments

Post a Comment

Popular posts from this blog

GSoC 2018 Final Report

-
Image
Project Overview: Bit Error Ratio testers are used to test the quality of signal transreception on a given medium. They also assist in tuning transmitter and receiver parameters so that medium fidelity is maximized. Several secure IP cores exist which may be implemented on FPGA to serve this purpose, one example being iBERT LogiCore by Xilinx. iBERT LogiCore is a GUI application which provides a nice interface for the user to change parameters such as prbs config, output swing, pre/post cursor settings, equalizer settings, etc. and observe the changes in bit error ratio. My project, as part of Google Summer of Code 2018, was to design and test an opensource equivalent of iBERT LogiCore and add most features as detailed in its datasheet. All files are coded in python-based HDL framework - migen and use an SOC ecosystem based on Migen - LiteX , to create the necessary host connections. This IP majorly uses 7 series MGT transceiver primitives GTPE2_COMMON and GTPE2_CHANNEL. Code
Read more

17th - 19th July

-
Image
1) Implemented simple PMA loopback on te014 board with PRBS data. This was achieved without alignment. 2) There seems to be some issue with the BruteForceClockAligner class and hence the receiver never completes reseting to output the correct phase. 3) Updated the GUI to include MGT functions. Next steps: 1) Look into the issue with the clock aligner class. 2) Add MGT setting event handlers.
Read more

Introduction

-
Hi there! Welcome to my blog. About me :  I am Harsh Gugale, a senior UG student at Indian Institute of Technology (BHU) Varanasi, pursuing a bachelors degree in Electronics Engg. About Google Summer of Code :  Google Summer of Code (GSoC) is a summer internship program by Google where students can work with open source organizations from around the world, contribute to these organizations by either working on existing projects or something entirely new and in turn get paid from Google in doing so! (Cool isn't it?) Organization : I am taking part in GSoC 2018 under TimVideos . TimVideos.us is a group of exciting projects which provide both hardware and software solutions to record and live video stream conferences, meetings, and other presentations. Project : Bit error ratio testers are used to test the quality of signal trans-reception. They are routinely used to test boards with high-speed serial links and tune parameters so that the medium fidelity is maximized. In
Read more